MIPS Introduction

Intorduction

• MIPS or Microprocessor without Interlocked Pipeline Stages is a reduced instruction set computer (RISC) instruction set architecture
• The first commercial MIPS model, R2000 was announced in 1985.It had thirty-two 32-bit general purpose registers, but no condition code register which the designers considered it a potential bottleneck.
• Figure 1 shows the architecture of MIPS R2000.

Figure 1

• From Figure 1, a SPIM processor compose of an integer processing unit (the CPU), and a collection of coprocessor that perform subsidiary tasks.
• SPIM simulates two coprocessor, Coprocessor 0 handles traps, exceptions, and the virtual memory system.MIPS simulates most of the first two and entirely omits details of the memory system.Coprocessor 1 is the floating point unit.SPIM simulates most aspects of this units.